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You are here: Home / Innovation / IBM Unveils 5-Nanometer Chip
IBM Researchers Unveil 5-Nanometer Semiconductor Chip
IBM Researchers Unveil 5-Nanometer Semiconductor Chip
By Shirley Siluk / Sci-Tech Today Like this on Facebook Tweet this Link thison Linkedin Link this on Google Plus
As the latest 10-nanometer processors that can pack far more transistors into a tiny space begin appearing in more electronic devices, IBM and its partners are already envisioning an even more advanced chip: a 5-nanometer processor that could contain as many as 30 billion transistors.

Researchers with IBM, GlobalFoundries, Samsung, and the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering have developed a new process that could produce 5-nanometer chips using silicon nanosheet transistors. They said the innovation could speed up applications for cognitive computing, the Internet of Things and cloud-based data processing.

Details about the new process are set to be presented at the 2017 Symposia on VLSI Technology and Circuits that kicked off today in Kyoto. Five-nanometer processors could also make smartphones and other mobile devices last far longer on a single battery charge -- perhaps as much as two to three times longer, according to IBM.

Switches the Width of 2-3 Strands of DNA

The most efficient silicon chips today are manufacturing using a technology called FinFET (fin field effect transistor) that uses thin, vertical silicon "fins" to improve electrical control in transistors. The technology, which helps minimize the usual performance-versus-power tradeoffs of processor manufacturing, is being used to produce today's most advanced 10-nanometer chips for electronic devices.

By contrast, IBM and its research partners have developed a new process to build transistors by layering silicon nanosheets in horizontal stacks. The process provides an additional, fourth horizontal "gate" for transmitting electrical signals on a transistor.

"At these dimensions, it means that those signals are passing through a switch that's no larger than the width of two to three DNA strands, side-by-side," Huiming Bu, IBM's director of silicon integration and device research, wrote today in a blog post. "More ways to send a signal on more 5nm transistors equates to a 40 percent performance improvement over 10nm chips, using the same amount of power; or a 75 percent power savings, at the same performance level."

New Processes Needed for 5-Nanometer Efficiency

Using the latest FinFET technology, Samsung last year began producing 10-nanometer chips for new electronic devices, including its own Galaxy S8 smartphone, which was launched in April.

Meanwhile, research efforts have been ongoing to develop even smaller, more efficient processors. Two years ago, for example, IBM and its research partners announced that they had succeeded in producing a 7-nanometer chip using a number of novel processes and techniques. However, using similar FinFET technology to build a 5-nanometer chip would not provide the expected power and performance gains, Bu noted in his blog post today.

"With regard to the manufacturing date of 5-nanometer technology, I'd say it would happen in the next few years," Bu added in a new video posted by IBM. "This is really good news for everyone in semiconductors or the whole society, whether you're programming the next apps or you're simply excited about the next devices which can take advantage of this technology."

Meanwhile, IBM and its partners expect to begin commercializing their 7-nanometer chip technology in 2018.

Image credit: IBM/Connie Zhou. Pictured Above: IBM Research scientist Nicolas Loubet holds a wafer of chips with 5nm silicon nano sheet transistors.

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